European Processor Initiative will have ZeroPoint IP in their chip

ZeroPoint Technologies provides the world’s only available Memory Booster IP block for System on Chips (SoCs), effectively doubling a computer’s main memory capacity and memory bandwidth; providing significantly more performance per watt.

The European Processor Initiative (EPI) is a European processor project to design and build a new family of European low-power processors for supercomputers, Big Data, automotive, and offering high performance on traditional HPC applications and emerging applications such as on machine learning. It is led by a consortium of European companies and universities.

The most challenging bottlenecks in computing typically stem from memory capacity and bandwidth. ZeroPoint Technologies overcomes these bottlenecks. We provide Ziptilion™ – a memory booster technology for Servers and Smart devices. Ziptilion™ is not another memory, it is an innovative patented technology that doubles the capacity and bandwidth to existing memory technologies at unmatched energy efficiency.

Worldwide, servers were consuming about 1-2% in 2020 of global electricity and this is predicted to increase 5 to 10-fold by 2040. ZeroPoint’s technology can drastically increase the energy efficiency of Servers. A typical data center consuming 1 TWh/year, could save up to 20% on energy cost. Our technology increases system performance per watt significantly, at lower CAPEX and OPEX.

“ZeroPoint Technologies’ vision is to enable high performance Servers and Smart devices that are environmentally friendly. Memory bottlenecks are a tremendous challenge for SoC developers, and we mitigate this challenge by doubling main memory capacity and memory bandwidth. Systems with memory booster technology are environmentally friendly and financially effective. By putting unused memory to work we can deliver up to 50% more performance per watt. And this is the single most important metric to high performance Servers and Smart devices.”, says ZeroPoint Technologies CEO Klas Moreau.

ZeroPoint Technologies’ IP block is easy to integrate with existing industry standard on-chip-bus-protocols. The IP-block is placed on the memory access path and is invisible to the operating system and applications. Thanks to the ultra-tuned compression/decompression accelerators and that data is compressed when fetched from memory, the memory access latency is often shorter with Ziptilion™ than without.

ZeroPoint Technologies is a spinout from Chalmers University of Technology in Gothenburg, Sweden, and has over the years developed an impressive IP Portfolio in the memory compression domain. Their patented compression technology is based on 15 years of research. Today the company works with industry leaders on product implementation projects and technical evaluations.

For further information contact
Klas Moreau, CEO at +46-725-268101